5G NR LDPC Decoder IP Core

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5G NR LDPC Decoder IP Core

Market-leading throughput and hardware usage efficiency with minimal power/energy consumption

Tannera’s 5G NR LDPC Decoder IP Core corrects bit errors that happen due to the imperfect transmission through a telecommunication channel. The core optimizes all performance parameters (throughput, latency, flexibility, SNR, power) for the lowest possible amount of hardware resources (logic, memory, registers). Such a feature is obtained by exploiting proprietary and patented LDPC decoding technology that maximizes the computing power by keeping hardware resources fully utilized. Therefore, Tannera’s 5G NR LDPC Decoder IP Core brings down the decoding complexity and enables efficient, reliable and high speed communications. The core supports ASIC and FPGA implementations.

Efficiency gain of 65%-100%

comparing to other market solutions

boosts throughput and hardware usage efficiency with up to 5.5 Gbps of information throughput and efficiency of over 73 Mbps/kLUT,

provides the lowest power/energy consumption per decoded bit

The optimal solution

for all use cases

high bandwidth systems for the highest spectral efficiency,

low-power systems running on a reduced hardware footprint,

anything in between

Support for all codes defined in 5G NR standard (3GPP TS 38.212)
Coded throughput up to 6.04 Gb/s
Information throughput up to 5.51 Gb/s
Latency < 10 µs for all codes
AXI4-Stream interfaces for easy integration
Extremely high hardware usage efficiency: the highest throughput for the limited hardware resources available on the market

Fast convergence due to a proprietary layered LDPC decoding algorithm
Stop criterion when all parity checks are satisfied for significant energy savings
Configurable LDPC decoding iterations number for speed/error correcting performance trade-off
Parallelism choice for optimal relation of throughput, latency, and resources
Includes de-puncturing and filler bit removal
Easily customizable as per request by the customer

Implementation & performance results for Xilinx Ultrascale+ FPGA for the highest parallelism:

Clock	LUTs	FFs	BRAMs	Peak Info Throughput @ 8 iterations	Peak Efficiency @ 8 iterations
425 MHz	75,124	67,697	120.5	5.5 Gbps	73.35 Mbps/kLUT

Clock	LUTs	FFs	BRAMs	Peak Info Throughput @ 8 iterations	Peak Efficiency @ 8 iterations
425 MHz	75,124	67,697	120.5	5.5 Gbps	73.35 Mbps/kLUT

Information throughput efficiency vs. code rate for 5G NR Base Graph 1 & Base Graph 2 codes for the highest parallelism:

5G introduces a wide spectrum of applications that require high throughput, low latency, and ultra reliable LDPC* decoding while supporting very high flexibility. This implies that the decoding requires extremely high computational power. Tannera’s 5G NR LDPC Decoder IP Core squeezes out the maximum computing power from available hardware resources.

Tannera’s 5G NR LDPC Decoder optimizes all performance parameters (throughput, latency, flexibility, SNR) for the lowest possible amount of hardware resources (logic, memory, registers). Such a feature is obtained by exploiting proprietary LDPC decoding algorithms and hardware architecture that maximizes the computing power by keeping hardware resources fully utilized. Therefore, Tannera’s 5G NR LDPC decoder decodes a maximum number of bits per unit of time and thus obtains the maximized energy efficiency expressed as the number of decoded bits per joule.

Tannera’s 5G NR LDPC Decoder IP Core corrects bit errors that happen due to the imperfect transmission through a telecommunication channel. Channel coding is almost always the most complex functionality of the entire physical layer (layer 1 - L1) baseband processing. Therefore, the complexity of the entire 5G NR data path L1 processing might be determined by the complexity of the LDPC decoder. Tannera’s 5G NR LDPC Decoder IP Core brings down that complexity and enables efficient, reliable and high throughput communications. The core supports ASIC and FPGA implementations.

*LDPC codes are the most frequently adopted channel codes in the entire telecommunication industry due to their superior error correcting performance and reasonable decoding complexity.

Use cases:

eMBB

eMBB (Enhanced Mobile Broadband) applications require the huge network capacity which states a challenge for a successful decoding in the RAN infrastructure both in computing resources and in power consumption. On the other hand, user equipment (UE) devices should support newly adopted speeds while remaining power efficient.

mMTC

mMTC (Massive Machine-Type Communications) are used to connect a large number of devices (machines) in order to enable a transformation of IoT. To support such a connectivity (over a million devices (users) per 1 square kilometer), a significant number of small-cell base stations must be placed at the small area. These stations must adeptly handle data from low-bandwidth devices, with the primary challenge residing not in the bandwidth but in the staggering volume of connections. It is imperative to integrate low-latency LDPC decoding, easily configurable for diverse device specifications. Moreover, the decoding process should demonstrate low power consumption and robust capability in managing an extensive array of connected devices. (more about mMTC use cases available at the link)

URLLC

URLLC (Ultra Reliable Low Latency Communications) applications require ultra reliable and low latency solutions. Such a system does not allow retransmissions for reliability improvements (available in eMBB applications) since retransmissions require time, so low latency requests would not be met. A good example is autonomous driving, where it is expected to transfer a large amount of data, accurately, and with low latency. LDPC decoder built specifically for eMBB scenarios might not be able to provide the required reliability (99.999%) due to possible error floors. Tannera’s 5G NR LDPC Decoder IP Core provides low error-floor performance while keeping the waterfall region SNR low. (more about URLLC use cases available at the link)

Optical

Optical communications increasingly use 5G NR LDPC codes for channel coding. Some applications are standardized such as SDA OCT V 3.0 for free space optical communications (FSO). Tannera provides an optimized IP core that utilizes all the main features of 5G NR LDPC Decoder IP Core but with optimized hardware resources and power efficiency.

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