the Future of
Interconnectivity
for the next generation of wireless
and satellite communication systems
and Internet-of-Things.
Products
5G NR LDPC
Decoder IP Core
Scalable architecture enabling high throughput at limited HW resources. Single core achieves up to 5.5 Gbps in FPGA implementation with the most efficient HW utilization on the market. Fully flexible solution available for ASIC and FPGA. Customizable for other QC-LDPC codes, applicable in other use cases (satcom, optical).
5G NR LDPC
Encoder IP Core
Scalable architecture enabling high throughput for most (short and long) codes defined in the standard. Achieves over 12 Gbps with very low HW utilization. Fully flexible solution available for ASIC and FPGA. Customizable for other QC-LDPC codes, applicable in other use cases (satcom, optical).
L1 acceleration
solutions for 5G vRAN
DPDK/BBDEV compliant accelerator IP for PCIe FPGA platforms supporting full FEC chain including LDPC, rate-matching, interleaving, HARQ, CRC. Scalable solution readily available for deployment in both macrocell and enterprise networks.
Custom accelerator for PDSCH and PUSCH available.
Already integrated with L1 SW vendors.
DVB-S2(x) LDPC
Decoder IP Core
Standard compliant decoder achieving worst-case coded throughput 3.3 Gbps @10 iterations with highly optimized logic and memory utilization. Scalable solution supporting multiple parallelism levels and providing the best hardware usage efficiency on the market.
DVB-S2(x) LDPC
Encoder IP Core
Standard compliant encoder achieving worst-case coded throughput of 16 Gbps with highly optimized logic and memory utilization. Scalable solution supporting multiple parallelism levels and providing the best hardware usage efficiency on the market.
Other DSP and FEC IP Cores
Tannera provides other FEC IP cores and optimized IP cores for digital signal processing with a particular focus on wireless communications.
- • Generic BCJR/Viterbi decoder
- • Reed Solomon & BCH
- • (I)FFT
- • QAM/(A)PSK mapper/demapper
- • AWGN channel emulator
Services
Customization
We customize our solutions to meet specific design requirements, and support all-level system integration. We help customers to get the most out of our IP.
- Application specific optimization of hardware utilization
- Performance and flexibility tuning
- FPGA & ASIC
- Interfaces modification
- Reusing/redesigning IP cores for other standards
- Designing surrounding blocks for optimal integration
Consulting & System Design
We evaluate and provide recommendations for the overall wireless system or subsystem architecture including the following areas:
- research & development
- system design
- FPGA & ASIC
- embedded systems
- testing & verification
- performance evaluation
We offer modem design for miscellaneous wireless standards (5G NR, DVB-S2(x), WiFi, automotive radio) and custom waveforms (OFDMA/SC-FDMA-based).
Partners
About
Tannera, LLC was founded in Los Angeles, California in 2018. The company is primarily focused on products and services in the domain of wireless and satellite communications and Internet-of-Things.
Our mission is to deliver cutting-edge technology solutions for the future of interconnectivity.
Andreja Radosevic
CEO
Andreja is Tannera's Chief Executive Officer. He earned a Ph.D. degree from UC San Diego’s Department of Electrical and Computer Engineering under supervision of a world-famous professor John Proakis.
He started his career at Qualcomm, where he was one of the key contributors to development of baseband modem supporting multiple cellular standards, including 5G NR.
With entrepreneurial spirit and technology enthusiasm, he founded Tannera with the aim to establish an IP licensing powerhouse supporting various wireless industry segments through disruptive innovation in FEC and modem design.
Andreja is experienced in wireless communications, digital signal processing, information and coding theory, and machine learning.
Vladimir Petrovic
CTO
Vladimir is Tannera's Chief Technology Officer. He is leading the technology development with strong enthusiasm, challenging the team to innovate with a focus on constantly improving the product's quality, thus making Tannera a center of excellence for wireless communications.
He finished his Dipl. Ing. degree in Electrical and Computer Engineering from the University of Belgrade as a valedictorian (GPA: 10.0/10.0), and earned a Ph.D. degree from the same school with a thesis focused on highly efficient LDPC codecs.
Vladimir is experienced in channel coding, digital design, wireless communications, and signal processing, with over 10 years of professional experience in industry and academia. He is also an Assistant Professor at the University of Belgrade - School of Electrical Engineering.
Lazar Todorovic
Head of Embedded Systems
Lazar is Tannera's Head of Embedded Systems. He finished his Bsc and Msc degrees in Electrical and Computer Engineering from the University of Belgrade - School of Electrical Engineering.
Lazar is an embedded software engineer with 10+ years of experience with a passion for bringing products to life. He has an excellent track record in firmware development, software integration, and product launches.