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CAREERS

Junior FPGA Design Engineer/Intern

 
Location: Belgrade, Serbia 
Typefull-time, on-site
Experience: Junior, Internship

Tannera is a PHY IP design company founded in 2018, with offices in Belgrade, Serbia and Santa Monica, California. We specialize in 5G NR, O-RAN, and satellite communication systems—building best-in-class algorithms and hardware architectures deployed in next-generation wireless infrastructure worldwide.

We are looking for Junior FPGA Design Engineers and Interns to join our PHY development team. You will be responsible for designing, implementing, optimizing, and integrating high-throughput 5G NR signal and data processing blocks on state-of-the-art FPGA platforms.

What You'll Do

Design:

  • Develop RTL (VHDL/Verilog) for medium-high complexity DSP algorithms and data processors tailored for 5G PHY.

Optimize:

  • Push the limits of FPGA resources to achieve ultra-low latency and maximum throughput.

Verify:

  • Create unit tests alongside IP core implementation (testbench, FPGA runtime testing), validating in hardware-in-the-loop environments.

Collaborate & Learn:

  • Work closely with our senior engineers on architectural design and with the algorithm team to efficiently translate software-level reference models (Python/C/C++) into efficient hardware implementation.

Integrate:

  • Work on integrating independent FPGA IP cores into efficient FPGA accelerators.

 

What We're Looking For

Depending on your level, we expect a mix of the following:

Experience:

  • Final-year undergraduate or graduate students (internship positions), 0-3 years of industry experience in digital ASIC/FPGA design (junior positions).

The Fundamentals

  • Proficiency in HDL (VHDL or Verilog)
  • Experience in C/C++ and Python
  • Fundamentals in object-oriented programming

 The 5G Factor:

  • Understanding digital signal processing
  • Experience with hardware architectures for DSP and wireless PHY is a huge plus

 The Mindset:

  • A problem-solver who enjoys design at the bit-level and cares about clean, maintainable code.

 Soft-skills:

  • We value excellent written and verbal communication, as well as technical presentation skills.
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Why Tannera

Cutting-Edge Tech:

  • At Tannera, we design advanced PHY algorithms and hardware architectures for 5G NR, O-RAN, and satellite communication systems. We work on AMD Versal and Virtex UltraScale+ FPGAs and partner with industry-leading vendors to deploy best-in-class, low-power base station technology.

Impact

  • Your code will run in the infrastructure that connects millions.

 Growth:

  • A flat hierarchy where your ideas are heard, and professional development is prioritized.

 Flexibility:

  • We value output over “desk time”, offering a healthy work-life balance. The role is primarily on-site in Belgrade, with hybrid flexibility available after the onboarding period.

 

How to Apply

Send your CV to careers@tannera.io.

 


At Tannera, we are not just builders of technology but architects of a connected future.

We invite you to partner with us and leverage our proven R&D expertise to shape the next generation of communication systems together.